1.8V 0.18µm CMOS Novel Successive Approximation ADC
نویسندگان
چکیده
With the increased sophistication of System-on-Chip (SOC) architectures comes an increased need for low power Analog to Digital converters. These converters have many uses including Built-in-Self-Test (BIST) applications. In this paper, we present a novel Successive Approximation ADC. We show how one can utilize an existing DAC structure on an SOC to realize an effective Analog-to-Digital converter for self-testing applications. The achieved ADC operates at 125 MSamples/s consuming only 3.8 mW of power. The design is implemented in 0.18μm 1.8-V CMOS technology.
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